发明名称 GATE CD CONTROL USING LOCAL DESIGN ON BOTH SIDES OF NEIGHBORING DUMMY GATE LEVEL FEATURES
摘要 A method of forming an IC including MOS transistors includes using a gate mask to form a first active gate feature having a line width W1 over an active area and a neighboring dummy feature having a line width 0.8W1 to 1.3W1. The neighboring dummy feature has a first side adjacent to the first active gate feature, and a nearest gate level feature on a second side opposite the first side. The neighboring dummy feature defines a gate pitch based on a distance to the first active gate feature or the neighboring dummy feature maintains a gate pitch in a gate array including the first active gate feature. The spacing between the neighboring dummy feature and the nearest gate level feature (i) maintains the gate pitch or (ii) provides a SRAF enabling distance that is ≧2 times the gate pitch and the gate mask includes a SRAF over the SRAF distance.
申请公布号 US2012107729(A1) 申请公布日期 2012.05.03
申请号 US20100915974 申请日期 2010.10.29
申请人 BLATCHFORD JAMES WALTER;CHOI YONG SEOK;ATON THOMAS J.;TEXAS INSTRUMENTS INCORPORATED 发明人 BLATCHFORD JAMES WALTER;CHOI YONG SEOK;ATON THOMAS J.
分类号 G03F1/00;G06F17/50;H01L21/336 主分类号 G03F1/00
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