发明名称 SUBSTRATE WITH EMBEDDED PATTERNED CAPACITANCE
摘要 A process for forming a laminate with capacitance and the laminate formed thereby. The process includes the steps of providing a substrate and laminating a conductive foil on the substrate wherein the foil has a dielectric. A conductive layer is formed on the dielectric. The conductive foil is treated to electrically isolate a region of conductive foil containing the conductive layer from additional conductive foil. A cathodic conductive couple is made between the conductive layer and a cathode trace and an anodic conductive couple is made between the conductive foil and an anode trace.
申请公布号 US2012106032(A1) 申请公布日期 2012.05.03
申请号 US201213345227 申请日期 2012.01.06
申请人 PRYMAK JOHN D.;STOLARSKI CHRIS;MELODY ALETHIA;CHACKO ANTHONY P.;DUNN GREGORY J.;KEMET ELECTRONICS CORPORATION 发明人 PRYMAK JOHN D.;STOLARSKI CHRIS;MELODY ALETHIA;CHACKO ANTHONY P.;DUNN GREGORY J.
分类号 H01G9/025;H01G7/00;H01G9/04;H01G9/15 主分类号 H01G9/025
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