发明名称 Co-packaging approach for power converters based on planar devices, structure and method
摘要 A voltage converter includes an output circuit having a high-side device and a low-side device which can be formed on a single die (a “PowerDie”). The high-side device can include a lateral diffused metal oxide semiconductor (LDMOS) while the low-side device can include a planar vertical diffused metal oxide semiconductor (VDMOS). The voltage converter can further include a controller circuit on a different die which can be electrically coupled to, and co-packaged with, the power die.
申请公布号 US8168490(B2) 申请公布日期 2012.05.01
申请号 US20090470229 申请日期 2009.05.21
申请人 HEBERT FRANCOIS;INTERSIL AMERICAS, INC. 发明人 HEBERT FRANCOIS
分类号 H01L21/8238 主分类号 H01L21/8238
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