| 摘要 |
1,261,951. Selective signalling. PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd. 18 March, 1969 [21 March, 1968], No. 14171/69. Heading G4H. In a delta-modulation system of the type in which the size of the increment represented by each transmitted pulse is varied, the variation is effected by examining the pattern of pulses that occurs in each successive group of n time-slots, n being equal to three or more, and by varying the gain in the encoder feed-back loop. In a preferred embodiment an input signal 1, Fig. 1, a, Fig. 4a, is compared 4 with a feed-back signal b, Fig. 4a, to gate 8 selected clock-pulses 7 to a transmission line 16, the gated clock-pulses passing via variable gain amplifier 23, 34, to an integrator 6 to produce the feed-back signal. The gain of the amplifiers in the feed-back path is controlled by the output signal, Fig. 4e, of an integrator 29 which receives a pulse one timeslot long every time a pattern of four consecutive ones or of four consecutive zeros is detected in the transmitted pulse train by an analysing circuit 27. The analysing circuit comprises (i) a counter 42 consisting of two series-connected triggers 46, 47 and therefore able to count to four, the counter being so arranged that it only produces an output via an AND gate 48 when it registers a count of four and so that when this occurs subsequent input clock-pulses 7 are blocked at an AND gate 44, and (ii) a reset circuit 43 which sets the counter to zero whenever a transition from "pulse" to "no pulse" or vice-versa occurs in the transmitted pulse train. The result is that every time four consecutive ones or zeros occur a signal, Fig. 4d, is applied to the gain controlling integrator 29, and hence the effective incremental size of each transmitted pulse is varied in such a way that the feed-back signal follows the input signal as closely as possible. In a modification (Figs. 5 and 6, not shown) patterns of four consecutive zeros only are detected and as a result the counter can be of simpler construction and a counter using charge storage is described. In a second modification (Figs. 7 and 8, not shown) the pulses for transmission are also fed to a six-stage shiftregister and groups containing four or more consecutive ones are looked for by appropriately connected gates. In a third modification (Figs. 11 and 12, not shown) the gain control integrator is formed from a reversible binary counter controlling weighted resistors. Several other modifications are outlined including the use of a controlled attenuator e.g. a MOST (Fig. 9, not shown) and a pulse-duration modulator (Fig. 13, not shown) in place of the variable gain amplifiers in the feed-back path. |
