摘要 |
<P>PROBLEM TO BE SOLVED: To provide a MIS structure that provides a low on-resistance and a low threshold voltage and enables a high-frequency operation. <P>SOLUTION: A trench MIS device is formed in a semiconductor die that contains a P-epitaxial layer that overlies an N<SP POS="POST">+</SP>substrate and an N-epitaxial layer. In one embodiment, the device includes a drain-drift region extending from the bottom of the trench to the N-epitaxial layer. A termination region of the die includes a half-trench at an edge of the die and an N-type region extending from a bottom of the half-trench to the substrate. An insulating layer and an overlying metal layer thereof extend from the surface of the epitaxial layer into the half-trench. Preferably, the elements of the termination region are formed during the same process steps as that are used to form the active elements of the device. In another embodiment, the device is terminated by a plurality of polysilicon-filled termination trenches located near the edge of the die, with the polysilicon in each termination trench being connected to the mesa adjacent to the termination trench. <P>COPYRIGHT: (C)2012,JPO&INPIT |