| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an MRAM which provides cost advantage of a DRAM, high-speed read-write performance of an SRAM, and nonvolatility of a flash memory. <P>SOLUTION: A non-volatile memory array includes a plurality of word-lines and a plurality of columns. One of the columns further includes a bistable regenerative circuit coupled to a first, a second, a third, and a fourth signal lines. The column also includes a non-volatile memory cell having current carrying terminals coupled to the first and second signal lines and a control terminal coupled to one of the plurality of word-lines. The column further includes a first transistor and a second transistor. The first transistor is coupled to the first terminal of the bistable regenerative circuit, and to a fifth signal line. The second transistor has a first current carrying terminal coupled to the second terminal of the bistable regenerative circuit, and a second current carrying terminal coupled to a sixth signal line. The gate terminals of the first and second transistors are coupled to a seventh signal line. <P>COPYRIGHT: (C)2012,JPO&INPIT |
