发明名称 Method to improve reliability (EM and TDDB) with post silylation plasma treatment process for copper damascene structures
摘要 A method for semiconductor fabrication includes etching a via and a trench in a dielectric material to yield an etched surface. The dielectric material may have an ultra-low K value (e.g., a K-value of less than or equal to 2.4). The etched surface is then processed with a gas-phase silylation process to yield a silylated surface. The silylated surface is processed with a plasma treatment process to yield a plasma treated surface. The plasma treated surface, in turn, is processed with a dilute hydrofluoric acid before a conductive metal is deposited in the via and the trench. Inclusion of the plasma treatment process reduces hollow metal defects caused by the silylation process and increases reliability of metal interconnects and improves barrier metallization.
申请公布号 US2012100716(A1) 申请公布日期 2012.04.26
申请号 US20100925374 申请日期 2010.10.20
申请人 SRIVASTAVA RAVI PRAKASH;PERMANA DAVID MICHAEL;GLOBALFOUNDRIES SINGAPORE PTE., LTD 发明人 SRIVASTAVA RAVI PRAKASH;PERMANA DAVID MICHAEL
分类号 H01L21/768 主分类号 H01L21/768
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