发明名称 |
High Sheet Resistor in CMOS Flow |
摘要 |
An integrated circuit containing CMOS gates and a counterdoped polysilicon gate material resistor which has a body region that is implanted concurrently with the NSD layers of the NMOS transistors of the CMOS gates and concurrently with the PSD layers of the PMOS transistors of the CMOS gates, and has a resistor silicide block layer over the body region which is formed of separate material from the sidewall spacers on the CMOS gates. A process of forming an integrated circuit containing CMOS gates and a counterdoped polysilicon gate material resistor which implants the body region of the resistor concurrently with the NSD layers of the NMOS transistors of the CMOS gates and concurrently with the PSD layers of the PMOS transistors of the CMOS gates, and forms a resistor silicide block layer over the body region of separate material from the sidewall spacers on the CMOS gates.
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申请公布号 |
US2012098071(A1) |
申请公布日期 |
2012.04.26 |
申请号 |
US201113278595 |
申请日期 |
2011.10.21 |
申请人 |
AGGARWAL RAJNI J.;YANG JAU-YUANN;TEXAS INSTRUMENTS INCORPORATED |
发明人 |
AGGARWAL RAJNI J.;YANG JAU-YUANN |
分类号 |
H01L27/092;H01L21/8238 |
主分类号 |
H01L27/092 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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