发明名称 INTERRUPT SIGNAL ACCEPTING DEVICE AND COMPUTER DEVICE
摘要 An interrupt signal accepting device (10) controls two OSs, associates an OS which causes devices (130) and (131) sharing the same interrupt number to perform an interrupt processing with an interrupt priority inherent in the device, and controls an interrupt number priority conversion table showing the association between the interrupt number and the interrupt priority. Each device continuously outputs an interrupt request having the same interrupt number until the interrupt processing is completed. An interrupt controller (120) converts the interrupt number into the interrupt priority in accordance with the interrupt number priority conversion table when there is an interrupt signal from the device (130) or the device (131). An interrupt signal control unit (11) causes an OS in operation to perform an interrupt processing to change the interrupt priority of the interrupt number priority conversion table when the converted interrupt priority corresponds to an interrupt priority associated with the OS in operation. The interrupt signal control unit (11) halts the OS in operation and activates other OS when the interrupt priority does not correspond.
申请公布号 WO2012053095(A1) 申请公布日期 2012.04.26
申请号 WO2010JP68694 申请日期 2010.10.22
申请人 MITSUBISHI ELECTRIC CORPORATION;MOTAI, HIROTAKA;YAMAGUCHI, TOMOHISA 发明人 MOTAI, HIROTAKA;YAMAGUCHI, TOMOHISA
分类号 G06F9/48;G06F9/46 主分类号 G06F9/48
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