发明名称 Semiconductor memory apparatus
摘要 A semiconductor memory apparatus includes an SRAM circuit having first SRAM cells that store data and second SRAM cells that amplify a potential difference of the data and store the potential difference, a word line driver circuit that outputs a first control signal for selecting one of the first SRAM cells to be read/written the data and a second control signal for selecting one of the second SRAM cells to be read/written the potential difference, a sense amplifier circuit that amplifies a potential difference of a read signal output from a bit line pair of the second SRAM cell selected according to the second control signal, and a write driver circuit that outputs a write signal to the bit line pair of the second SRAM cell selected according to the second control signal, and the write signal has a potential difference between bit lines larger than the read signal.
申请公布号 US8164962(B2) 申请公布日期 2012.04.24
申请号 US20090585495 申请日期 2009.09.16
申请人 TAKEDA KOICHI;RENESAS ELECTRONICS CORPORATION 发明人 TAKEDA KOICHI
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
主权项
地址