发明名称 Dual power rail word line driver and dual power rail word line driver array
摘要 A dual power rail word line driver for driving a word line of a memory array according to a predecode signal from a decoder powered by a first supply voltage is provided. A signal buffering unit is coupled between the word line and a node. A pull-down unit is coupled between the node and a ground. A pull-up unit is coupled between the node and a second supply voltage higher than or equal to the first supply voltage. The signal buffering unit provides a word line signal corresponding to the predecode signal to the memory array via the word line when the pull-down unit is turned on by the predecode signal and a first pulse signal and the pull-up unit is turned off by a second pulse signal. There is no level shifter on a critical timing path of the dual power rail word line driver.
申请公布号 US8164971(B2) 申请公布日期 2012.04.24
申请号 US20100719075 申请日期 2010.03.08
申请人 WANG CHIA-WEI;GEISLER JOSEPH PATRICK;HOLLIS PAUL WILLIAM;RUTLEDGE MATTHEW B;MEDIATEK INC. 发明人 WANG CHIA-WEI;GEISLER JOSEPH PATRICK;HOLLIS PAUL WILLIAM;RUTLEDGE MATTHEW B
分类号 G11C8/00 主分类号 G11C8/00
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