发明名称 Pixel array layout
摘要 A pixel array layout includes a substrate, a plurality of scan lines disposed on the substrate, a plurality of data lines disposed on the substrate, a plurality of pixel units disposed on the substrate, and a pre-discharge conductive layer. Each of the pixel units is electrically connected to at least one of the scan lines and one of the data lines correspondingly, and each of the pixel units has a driving circuit and a pixel electrode electrically connected to the driving circuit. The pre-discharge conductive layer is electrically connected to the driving circuit and extends to an area between two adjacent pixel electrodes from an edge of the substrate, and the pre-discharge conductive layer and the pixel electrodes do not overlap.
申请公布号 US8164544(B2) 申请公布日期 2012.04.24
申请号 US20090506257 申请日期 2009.07.21
申请人 LIN CHEN-WEI;HUANG YEN-SHIH;INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 LIN CHEN-WEI;HUANG YEN-SHIH
分类号 G09G3/20 主分类号 G09G3/20
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