发明名称 |
Microprocessor performing IIR filter operation with registers |
摘要 |
A filter operation circuit of a microprocessor executes an IIR filter operation by using data provided from registers R0 to R2 and outputs one sample of data Y[n] subjected to filter operation and transfer data P[n] to be used in the next IIR filter operation. Register R0 provides filter coefficients to the filter operation circuit. Register R1 provides past transfer data P[n−1] and P[n−2] to the filter operation circuit and is overwritten and updated with new transfer data P[n] output from the filter operation circuit. Register R2 holds multiple samples of data X[n] to X[n+3] to be subjected to filter operation and provides X[n] to the filter operation circuit. An area of register R2 in which X[n] has been held is overwritten and updated with Y[n]. |
申请公布号 |
US8166087(B2) |
申请公布日期 |
2012.04.24 |
申请号 |
US20080216962 |
申请日期 |
2008.07.14 |
申请人 |
MATSUYAMA HIDEKI;DAITO MASAYUKI;RENESAS ELECTRONICS CORPORATION |
发明人 |
MATSUYAMA HIDEKI;DAITO MASAYUKI |
分类号 |
G06F17/10 |
主分类号 |
G06F17/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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