发明名称 AN INSTRUCTION SEQUENCE BUFFER TO STORE BRANCHES HAVING RELIABLY PREDICTABLE INSTRUCTION SEQUENCES
摘要 A method for outputting reliably predictable instruction sequences. The method includes tracking repetitive hits to determine a set of frequently hit instruction sequences for a microprocessor, and out of that set, identifying a branch instruction having a series of subsequent frequently executed branch instructions that form a reliably predictable instruction sequence. The reliably predictable instruction sequence is stored into a buffer. On a subsequent hit to the branch instruction, the reliably predictable instruction sequence is output from the buffer.
申请公布号 WO2012051281(A2) 申请公布日期 2012.04.19
申请号 WO2011US55943 申请日期 2011.10.12
申请人 SOFT MACHINES, INC.;ABDALLAH, MOHAMMAD 发明人 ABDALLAH, MOHAMMAD
分类号 G06F9/30;G06F9/06;G06F9/305 主分类号 G06F9/30
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