发明名称 |
MULTI-WRITE ENDURANCE AND ERROR CONTROL CODING OF NON-VOLATILE MEMORIES |
摘要 |
Multi-write endurance and error control coding of non-volatile memories including a method for receiving write data and a write address of a memory page in a memory. The write data is partitioned into a plurality of sub-blocks, each sub-block including q bits of the write data. Error correction bits are generated at the computer in response to the sub-blocks and to an error correction code (ECC). At least one additional sub-block containing the error correction bits are appended to the partitioned write data and a write word is generated. The write word is generated by performing for each of the sub-blocks: selecting a codeword such that the codeword encodes the sub-block and is consistent with current electrical charge levels of the plurality of memory cells associated with the memory page; concatenating the selected codewords to form the write word; and writing the write word to the memory page. |
申请公布号 |
US2012096328(A1) |
申请公布日期 |
2012.04.19 |
申请号 |
US20100903695 |
申请日期 |
2010.10.13 |
申请人 |
FRANCESCHINI MICHELE M.;JAGMOHAN ASHISH;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
FRANCESCHINI MICHELE M.;JAGMOHAN ASHISH |
分类号 |
G06F11/08;G06F12/02 |
主分类号 |
G06F11/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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