发明名称 SYSTEM AND METHOD FOR CONTROLLING VOLTAGE RAMPING FOR AN OUTPUT OPERATION IN A SEMICONDUCTOR MEMORY DEVICE
摘要 A voltage driving circuit comprises a current bias generating unit and a voltage driving unit. The current bias generating unit is configured to receive a mode signal and to generate a mode selection current in response to the mode signal. The voltage driving unit is coupled to the current bias generating unit, and is configured to receive the mode selection current and to drive an output voltage at a slew rate that is set according to the mode selection current. The voltage driving unit can include a plurality of stages, where each stage is configured to drive the output voltage at a respective different slew rate according to the mode signal.
申请公布号 US2012091980(A1) 申请公布日期 2012.04.19
申请号 US20100906661 申请日期 2010.10.18
申请人 CHIANG JU-AN;MACRONIX INTERNATIONAL CO., LTD. 发明人 CHIANG JU-AN
分类号 G05F1/10 主分类号 G05F1/10
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