发明名称 EEPROM
摘要 <P>PROBLEM TO BE SOLVED: To provide an EEPROM capable of preventing erroneous writing caused by residual charge in a booster circuit. <P>SOLUTION: In an EEPROM of the embodiment, a booster circuit 2 generates a high voltage VPP higher than a power supply voltage VDD with a charge pump system, as a writing voltage supplied to nonvolatile memory cells arranged in a memory cell array 1. A discharge circuit 3 has an MOS transistor MT1 which is connected between an output terminal of the booster circuit 2 and a power line of a ground potential GND. When any one of a read enable signal RE, a standby signal ST, and a write protect signal WR_PRTCT is input, a discharge control circuit 4 outputs a discharge indication signal DSC to bring the MOS transistor MT1 of the discharge circuit 3 into conduction. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012079391(A) 申请公布日期 2012.04.19
申请号 JP20100226750 申请日期 2010.10.06
申请人 TOSHIBA CORP 发明人 FUJII OSAMU;NOTOYA KOICHI
分类号 G11C16/06 主分类号 G11C16/06
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