发明名称
摘要 <p>A method of forming a top gate transistor comprising the steps of providing a substrate carrying source and drain electrodes defining a channel region therebetween; treating at least part of the surface of the channel region to reduce its polarity; and depositing a semiconductor layer in the channel.</p>
申请公布号 JP2012509573(A) 申请公布日期 2012.04.19
申请号 JP20110521637 申请日期 2009.08.07
申请人 发明人
分类号 H01L29/786;H01L21/336;H01L51/05;H01L51/30;H01L51/40 主分类号 H01L29/786
代理机构 代理人
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