MEMORY-POINTS MATRIX FOR READING-WRITING DEVICE

摘要

1,211,524. Non-destructive stores. COMPAGNIE GENERALE D'ELECTRICITE. 3 Jan., 1969 [5 Jan., 1968], No. 618/69. Heading G4C. [Also in Divisions H1 and H3] A non-destructive read-out matrix store is constructed as an integrated circuit, each memory element comprising a tunnel diode 2, Fig. 2, in series with a resistor 4, whose common terminal A is connected to a normal diode 3 and a backward tunnel diode 1. Diode 1 is serially connected at E to a further tunnel diode 5 (not shown) to which writing pulses are applied, the combination having the characteristic shown in Fig. 3b. When a positive pulse is applied at L to diode 2 terminal A becomes less negative, and if diode 2 is storing a 0-bit (3011, Fig. 3c) the diode combination 1 + 5 is biased from point 301, Fig. 3b, into the conductive region so that current flowing in diode 2 passes through the combination rather than resistor 4. If diode 2 is storing a 1-bit (3111, Fig. 3c), the increase in potential at A is insufficient to bias the combination conductive from point 311, so diode 2 current passes to resistor 4. If a negative write pulse is applied to the diode combination 1. + 5 simultaneously with a read pulse at L the current in diode 2 is sufficient to bring it to point 32, the diode passing to point 3111 to point 32, the diode passing to point 3111 to store a 1-bit when the pulses cease. To store a 0-bit on diode 2 a positive pulse applied to F makes terminal A sufficiently less negative that diode 2 switches to point 3011.