发明名称 |
Method and system for analog frequency clocking in processor cores |
摘要 |
A method of and system for frequency clocking in a processor core are disclosed. In this system, at least one processor core is provided, and that at least one processor core has a clocking subsystem for generating an analog output clock signal at a variable frequency. Digital frequency control data and an analog signal are both transmitted to that at least one processor core; and that processor core uses the received analog signal and digital frequency control data to set the frequency of the output clock signal of the clocking subsystem. In a preferred implementation, multiple cores are asynchronously clocked and the core frequencies are independently set. |
申请公布号 |
US8161314(B2) |
申请公布日期 |
2012.04.17 |
申请号 |
US20070734334 |
申请日期 |
2007.04.12 |
申请人 |
JACOBOWITZ LAWRENCE;RITTER MARK B.;STIGLIANI, JR. DANIEL J.;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
JACOBOWITZ LAWRENCE;RITTER MARK B.;STIGLIANI, JR. DANIEL J. |
分类号 |
G06F1/12;G06F1/00;G06F1/04 |
主分类号 |
G06F1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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