发明名称 |
Interface between a twin-wire bus and a single-wire bus |
摘要 |
A method and a device for converting a first bus including at least a data wire and a clock wire into a single-wire bus, wherein a data bit of the first bus is converted on half a period of the clock signal for transmission over the second bus, a waiting pattern being placed on the second bus during the other half-period. |
申请公布号 |
US8161224(B2) |
申请公布日期 |
2012.04.17 |
申请号 |
US20090502634 |
申请日期 |
2009.07.14 |
申请人 |
LAURENCIN CHRISTOPHE;MODAVE JEAN-LOUIS;STMICROELECTRONICS (ROUSSET) SAS;PROTON WORLD INTERNATIONL N.V. |
发明人 |
LAURENCIN CHRISTOPHE;MODAVE JEAN-LOUIS |
分类号 |
G06F13/36;G06F13/20 |
主分类号 |
G06F13/36 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|