| 摘要 |
Trench-generated transistor structures, methods for fabricating transistors using a trench defined in a semiconductor-on-insulator (SOI) wafer, design structures for a trench-generated transistor, and other trench-generated device structures. The source and drain of the transistor are defined by doped regions in the semiconductor material of the handle substrate of the SOI wafer. The gate electrode may be defined from the semiconductor layer of the SOI wafer, which is separated from the handle wafer by an insulating layer. Alternatively, the gate electrode may be defined as a conventional gate stack on a shallow trench isolation region in the semiconductor layer or as a conventional gate stack in one of the BEOL interconnect levels. |
