发明名称 |
Display device and electronic apparatus |
摘要 |
Disclosed herein is a sampling transistor in an embodiment of the present invention is kept at the on-state with a time width shorter than one horizontal cycle, during the period from the rising of a control pulse supplied from a scanner to a scan line WS to the falling of the control pulse, and samples a video signal from a signal line SL to write the video signal to a hold capacitor. The sampling transistor includes the channel region between the source and the drain and has a sandwich gate structure in which a shield that electrically shields the channel region is disposed on the other side of the channel region. This suppresses change in the threshold voltage of the sampling transistor. |
申请公布号 |
US8159424(B2) |
申请公布日期 |
2012.04.17 |
申请号 |
US20090458810 |
申请日期 |
2009.07.23 |
申请人 |
YAMAMOTO TETSURO;YAMASHITA JUNICHI;UCHINO KATSUHIDE;JINTA SEIICHIRO;SONY CORPORATION |
发明人 |
YAMAMOTO TETSURO;YAMASHITA JUNICHI;UCHINO KATSUHIDE;JINTA SEIICHIRO |
分类号 |
G09G3/30 |
主分类号 |
G09G3/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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