发明名称 MULTILAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREFOR, AND MULTILAYER BUILD-UP WIRING BOARD AND MANUFACTURING METHOD THEREFOR
摘要 <P>PROBLEM TO BE SOLVED: To make the diameter of vias smaller than that of conventional vias without sacrifice of connection reliability because the connection area of via interface increases, and to obtain a printed wiring board or a build-up wiring board of higher density. <P>SOLUTION: In the multilayer printed wiring board, a plurality of wiring layers are formed on an insulating substrate with an insulation layer interposed therebetween, and the wiring layers are interconnected electrically by field vias. A groove or a hole is formed in the surface of a land of the wiring layer in order to form a hole for via in the insulation layer at a position corresponding to the land of the wiring layer, and a field via is formed in the hole for via thus interconnecting the wiring layers electrically. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012074557(A) 申请公布日期 2012.04.12
申请号 JP20100218559 申请日期 2010.09.29
申请人 TOPPAN PRINTING CO LTD 发明人 HAMADA TETSUO
分类号 H05K3/46;H05K1/11;H05K3/38;H05K3/40 主分类号 H05K3/46
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