发明名称 |
FIELD EFFECT TRANSISTOR, AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a structure that can reduce the zero current of a field effect transistor using conductor-semiconductor junction. <P>SOLUTION: A floating electrode 102 including a conductor or a semiconductor covered with an insulator 104 is formed between a semiconductor layer 101 and a gate 105 so as to cross the semiconductor layer 101. By charging the floating electrode 102, the carrier inflow from a source electrode 103a and a drain electrode 103b is prevented. Thus, the carrier concentration of the semiconductor layer 101 can be suppressed to be sufficiently low to reduce the zero current. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2012074692(A) |
申请公布日期 |
2012.04.12 |
申请号 |
JP20110192413 |
申请日期 |
2011.09.05 |
申请人 |
SEMICONDUCTOR ENERGY LAB CO LTD |
发明人 |
TAKEMURA YASUHIKO |
分类号 |
H01L21/336;H01L21/8242;H01L21/8247;H01L27/108;H01L27/115;H01L29/786;H01L29/788;H01L29/792 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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