DIGITAL PHASE LOCKED LOOP DEVICE AND METHOD IN WIRELESS COMMUNICATION SYSTEM

摘要

The present invention relates to a digital phase locked loop (PLL) in a wireless communication system, and the PLL comprises: a digitally controlled oscillator (DCO) which generates a frequency signal according to an inputted digital tuning word (DTW); a divider which divides said frequency signal by an integer ratio; a phase frequency detector (PFD) which generates a signal that indicates a phase difference between the divided frequency signal and a reference signal; a time to digital convertor (TDC) which measures a time interval of said phase difference by using the signal that indicates said phase difference; a delay comparator which calculates the time interval when rising edges are matched, from the values that are measured by said TDC; and a level scaler which generates a digital tuning word for operating said DCO by using a digital code that indicates said time interval.