Unified design methodology for multi-die integrated circuits

摘要

A method of designing an integrated circuit (IC) having multiple dies can include identifying a unified design library having a first process node specific (PNS) library for a first IC process technology and a second PNS library for a second IC process technology. The first PNS library can be correlated with a first die of the IC. The second PNS library can be correlated with the second die of the IC. Via a processor, a circuit element can be defined within a circuit design implemented within the IC according to the PNS library correlated to the die in which the circuit element is located.