发明名称 Resistance variable memory apparatus
摘要 A resistance variable memory apparatus (100) of the present invention includes a current suppressing element (116) which is connected in series with each resistance variable layer (114) and whose threshold voltage is VF, and is configured to apply a first voltage V1 to a first wire (WL) associated with a selected nonvolatile memory element, apply a second voltage V2 to a second wire (BL) associated with the selected nonvolatile memory element, apply a third voltage V3 to a first wire (WL) which is not associated with the selected nonvolatile memory element and apply a fourth voltage V4 to a second wire (BL) which is not associated with the selected memory element when writing data or reading data, wherein V2&nlE;V3<V5 and V5<V4&nlE;V1 are satisfied and (V1&minus;V4)<VF or (V3&minus;V2)<VF is satisfied when V5=(V1+V2)/2 is a fifth voltage V5.
申请公布号 US8154909(B2) 申请公布日期 2012.04.10
申请号 US201113165551 申请日期 2011.06.21
申请人 AZUMA RYOTARO;SHIMAKAWA KAZUHIKO;FUJII SATORU;PANASONIC CORPORATION 发明人 AZUMA RYOTARO;SHIMAKAWA KAZUHIKO;FUJII SATORU
分类号 G11C11/00 主分类号 G11C11/00
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