发明名称 THREE DIMENSIONAL STACKED SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE: A 3D laminated semiconductor integrated circuit is provided to reduce the number of TSVs(Through Silicon Via) by transmitting a pulse type signal from a master slice to a slave slice. CONSTITUTION: A 3D laminated semiconductor integrated circuit includes a master slice(110) and a plurality of slave slices(200). A plurality of slave slices share a plurality of TSVs for transmitting an operation control signal from the master slice to the plurality of slave slices. The operation control signal is a signal for controlling an active/precharge operation of the plurality of slave slices. The master slice transmits the operation control signal with the pulse type.</p>
申请公布号 KR20120033908(A) 申请公布日期 2012.04.09
申请号 KR20100095661 申请日期 2010.09.30
申请人 SK HYNIX INC. 发明人 YUN, TAE SIK;KU, YOUNG JUN
分类号 G11C5/02;H01L23/28 主分类号 G11C5/02
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