VERTICAL TRANSISTOR STRAM ARRAY

摘要

PURPOSE: A vertical transistor STRAM(Spin-Torque Transfer Random Access Memory) array is provided to reduce interface resistance and/or stress force between a memory cell and a vertical pillar transistor by including an electrically conductive mutual connection element. CONSTITUTION: A semiconductor wafer with a plurality of pillar structures is provided. The plurality of pillar structures are orthogonally extended from the semiconductor wafer. Each pillar structure has a vertical pillar transistor with the outermost surface and the lateral surface. An electrically conductive mutual connection element is deposited on the selected vertical pillar transistors. A nonvolatile change resistive memory cell is deposited on the electrically conductive mutual connection layer to form a vertical transistor memory array(108).