发明名称 HARDWARE DYNAMIC CACHE POWER MANAGEMENT
摘要 PURPOSE: A dynamic hardware cache power managing apparatus and a method thereof are provided to perform power management of a digital system and to initialize a circuit block for operation. CONSTITUTION: An L2 cache memory stores data for distinguishing a first operation group and a second operation group. The first operation group is a group to be performed before turning off the power of a circuit block. The second operation group is a group to be performed after turning on the power of the circuit block. A cache control circuit(52) receives a request for turning off the power of the circuit block.
申请公布号 KR20120034041(A) 申请公布日期 2012.04.09
申请号 KR20110099679 申请日期 2011.09.30
申请人 APPLE INC. 发明人 MILLET TIMOTHY J.;MACHNICKI ERIK P.;BALKAN DENIZ;GUPTA VIJAY
分类号 G06F1/00;G06F12/00 主分类号 G06F1/00
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