发明名称 FREQUENCY SYNTHESIZER BASED ON PHASE LOCKED LOOP AND METHOD FOR OPERATING THEREOF
摘要 PURPOSE: A frequency synthesizer based on a phase locked loop and an operating method thereof are provided to reduce a phase noise generated in a phase frequency detector by using a phase-frequency detector having a low operation speed. CONSTITUTION: A voltage control oscillator(150) controls an output frequency by using a control voltage. A multiple signal generator(110') generates a plurality of output reference signals having the same frequency and a different phase from an input reference signal. A fractional frequency divider(160) divides the output frequency. A pulse generator(180) generates a plurality of comparison signals having a comparison frequency lower than a divided frequency. A plurality of phase frequency detectors(1201-120m) outputs a pulse signal according to the phase difference and the frequency difference between the plurality of output reference signals and the comparison signal. A plurality of charge pumps(1301-130m) generates a control current corresponding to the pulse signal of the phase frequency detector. A loop filter(140) generates the control voltage from the control current.
申请公布号 KR20120032951(A) 申请公布日期 2012.04.06
申请号 KR20100094526 申请日期 2010.09.29
申请人 KOREA ELECTRONICS TECHNOLOGY INSTITUTE 发明人 KIM, KI JIN;AHN, KWANG HO
分类号 H03L7/085;H03L7/16 主分类号 H03L7/085
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