发明名称 SOLUTION FOR FULL SPEED, PARALLEL DUT TESTING
摘要 A system for use in automated test equipment. In one embodiment, the system includes a configurable integrated circuit (IC) programmed to provide test patterns and an interface to at least one device under test (DUT). The system also includes a connection to the at least one DUT, wherein the connection is coupled directly between the configurable IC and the at least one DUT.
申请公布号 WO2011150409(A3) 申请公布日期 2012.04.05
申请号 WO2011US38461 申请日期 2011.05.27
申请人 VERIGY (SINGAPORE) PTE. LTD;FILLER, W SCOTT VILLAREAL;TANTAWY, AHMED S.;VOLKERINK, ERIK H. 发明人 FILLER, W SCOTT VILLAREAL;TANTAWY, AHMED S.;VOLKERINK, ERIK H.
分类号 G11C29/10;G01R31/28 主分类号 G11C29/10
代理机构 代理人
主权项
地址