发明名称 |
HIGH VOLTAGE TOLERATIVE DRIVER |
摘要 |
A high voltage tolerative inverter circuit includes a first PMOS transistor with a source connected to VDDQ and drain connected to a first node; a second PMOS transistor with a source connected to the first node and a drain connected to an output; a first NMOS transistor with a source connected to VSS and a drain connected to a second node; a second NMOS transistor with a source connected to the second node and a drain connected to the output. A gate of the first PMOS transistor is controlled by a first signal having a voltage swing between VDDQ and VSS. A gate of the first NMOS transistor and the second PMOS transistor are controlled by a second signal having a voltage swing between VDD and VSS. VDD is lower than VDDQ. A gate of the second NMOS transistor is biased with a first voltage greater than VSS. |
申请公布号 |
US2012081165(A1) |
申请公布日期 |
2012.04.05 |
申请号 |
US20100894210 |
申请日期 |
2010.09.30 |
申请人 |
HUANG JIANN-TSENG;LIN SUNG-CHIEH;HSU KUOYUAN;CHEN PO-HUNG;TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
HUANG JIANN-TSENG;LIN SUNG-CHIEH;HSU KUOYUAN;CHEN PO-HUNG |
分类号 |
H03L5/00;H01H37/76;H01L25/00 |
主分类号 |
H03L5/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|