| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory controller capable of preventing the operating life of a semiconductor memory from being shortened by reducing write penalty and parity update frequencies. <P>SOLUTION: A semiconductor memory controller to which plural semiconductor memory drives are connected and that writes, onto the semiconductor memory drives, data of which logical address is specified and write is requested by an information processor includes: a write control unit for writing first data pieces in a predetermined unit and redundant information calculated by using a predetermined number of the first data pieces and used for correcting an error in the predetermined number of the first data pieces each onto a different semiconductor memory drive; a construction unit for constructing a first table storage area for storing a first table by using information on specifications of the semiconductor memory drives; and a table control unit for storing, in the first table storage area, the first table, in which identification information for associating the predetermined number of the first data pieces and the redundant information is associated with a physical address and a logical address of each of the predetermined number of the first data pieces written onto the semiconductor memory drives and a physical address of the redundant information. <P>COPYRIGHT: (C)2012,JPO&INPIT |
