发明名称 Transactional Memory Preemption Mechanism
摘要 Mechanisms for executing a transaction in the data processing system are provided. A transaction checkpoint data structure is generated in internal registers of a processor. The transaction checkpoint data structure stores transaction checkpoint data representing a state of program registers at a time prior to execution of a corresponding transaction. The transaction, which comprises a first portion of code that is to be executed by the processor, is executed. An interrupt of the transaction is received while executing the transaction and, as a result, the transaction checkpoint data is stored to a data structure in a memory of the data processing system. A second portion of code is then executed. A state of the program registers is restored using the data structure in the memory of the data processing system in response to an event occurring causing a switch of execution of the processor back to execution of the transaction.
申请公布号 US2012084477(A1) 申请公布日期 2012.04.05
申请号 US20100894308 申请日期 2010.09.30
申请人 ARNDT RICHARD L.;CAIN, III HAROLD W.;FREY BRADLY G.;MAY CATHY;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ARNDT RICHARD L.;CAIN, III HAROLD W.;FREY BRADLY G.;MAY CATHY
分类号 G06F13/24 主分类号 G06F13/24
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