发明名称 CLOCK CONVERSION APPARATUS, FRAME PROCESSING APPARATUS AND FREQUENCY CONTROL METHOD
摘要 In the present invention a clock conversion apparatus (45) comprises an elastic store memory (64) where data is written in synchronization with a first clock and data is read in synchronization with a second clock; a phase comparator (80) that detects the phase difference between a third clock constituting the frequency dividing clock of the first clock to which a first variable phase shift been added and a fourth clock constituting the frequency dividing clock of the second clock to which a second variable phase shift has been added; and an oscillator (47) that generates as the second clock a clock having a frequency that is in accordance with such phase difference.
申请公布号 WO2012042594(A1) 申请公布日期 2012.04.05
申请号 WO2010JP66813 申请日期 2010.09.28
申请人 FUJITSU LIMITED;SHIMIZU, MAKOTO;HORI, MASATO 发明人 SHIMIZU, MAKOTO;HORI, MASATO
分类号 H04L7/00 主分类号 H04L7/00
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