发明名称 Active Bit Line Droop for Read Assist
摘要 A static random access memory (SRAM) includes an SRAM cell to store a bit of data. A word line accesses the SRAM cell, which, responsively, during a read, drives either a bit line true (BLT) or a bit line complement (BLC) low. Both BLT and BLC are precharged to a supply voltage, then, subsequently are discharged to a reference voltage, lower than the supply voltage, prior to the word line being activated. Because the bit lines are at a voltage lower than the supply voltage when the SRAM cell is activated, the SRAM cell stability is improved.
申请公布号 US2012081949(A1) 申请公布日期 2012.04.05
申请号 US20100894451 申请日期 2010.09.30
申请人 ADAMS CHAD ALLEN;CESKY SHARON HUERTAS;GERHARD ELIZABETH LAIR;SCHERER JEFFREY MILTON;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ADAMS CHAD ALLEN;CESKY SHARON HUERTAS;GERHARD ELIZABETH LAIR;SCHERER JEFFREY MILTON
分类号 G11C11/40;G06F17/50;G11C5/14 主分类号 G11C11/40
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