发明名称 A LOW PHASE-NOISE FREQUENCY SYNTESIZER
摘要 PURPOSE: A frequency synthesizer having a low phase noise is provided to improve the spurious characteristic of a reference signal by using the PLL(phase-locked loop). CONSTITUTION: A reference signal generating unit(101) generates a reference signal. An LO2 signal generating unit(102) generates an LO2 signal from the reference signal generated. A DDS(Direct Digital Synthesizer)(103) generates a bandwidth signal. A bandwidth signal loop feedback unit(104) generates the bandwidth signal from which a spurious wave is removed. A frequency multiplying unit(105) multiplies the bandwidth signal, generated in the bandwidth signal loop feedback unit, by frequency. A PLO(Phase Locked oscillator)(106) generates a plurality of local oscillator signals. An LO1 signal generating unit(107) generates an LO1 signal having a plurality of frequency bands. A waveform generating unit(108) generates an LFM(Linear Frequency Modulation) signal, a PT(Pulse Train) signal, or a FMICW(Frequency Modulated Interrupted Continuous Wave) signal. A frequency raising unit(109) generates a radar Tx(Transmission) signal.
申请公布号 KR101133524(B1) 申请公布日期 2012.04.04
申请号 KR20120002449 申请日期 2012.01.09
申请人 SAMSUNG THALES CO., LTD. 发明人 LIM, JU HYUN
分类号 H03L7/16;H03L7/08 主分类号 H03L7/16
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