发明名称 Semiconductor memory device and inspecting method of the same
摘要 According to one embodiment, a semiconductor memory device includes a memory cell array includes memory cells, lines provided to correspond to the memory cells, a first decoder configured to select a first line as an inspection target from the lines, a second decoder configured to select a second line for generating a reference voltage from the lines, a driver configured to charge the first and second lines, a discharging circuit configured to simultaneously discharge the first and second lines, and a sense amplifier configured to compare a voltage of the first line with a voltage of the second line to detect a defect of the first line while the first line is discharged.
申请公布号 US8149638(B2) 申请公布日期 2012.04.03
申请号 US20100884694 申请日期 2010.09.17
申请人 KUROSAWA TOMONORI;SASAKI TAKAHIKO;KANDA KAZUSHIGE;KABUSHIKI KAISHA TOSHIBA 发明人 KUROSAWA TOMONORI;SASAKI TAKAHIKO;KANDA KAZUSHIGE
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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