发明名称 |
Memory devices implementing clock mirroring scheme and related memory systems and clock mirroring methods |
摘要 |
A memory device is configured to operate in first and second data input/output modes. The memory device includes a first electrode pad, a second electrode pad, a clock signal line, a first switching unit, and a second switching unit. The clock signal line is configured to transmit a clock to an integrated circuit inside the memory device. The first switching unit switches to electrically connect the first electrode pad and the clock signal line in response to a control signal occurring for the first data input/output mode. The second switching unit switches to electrically connect the second electrode pad and the clock signal line in response to an inverse signal of the control signal occurring for the second data input/output mode. |
申请公布号 |
US8151010(B2) |
申请公布日期 |
2012.04.03 |
申请号 |
US20100902328 |
申请日期 |
2010.10.12 |
申请人 |
KIM JIN-GOOK;PARK KWANG-IL;BAE SEUNG-JUN;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM JIN-GOOK;PARK KWANG-IL;BAE SEUNG-JUN |
分类号 |
G06F3/00 |
主分类号 |
G06F3/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|