发明名称 Receivers for cycle encoded signals
摘要 Some embodiments include a transmitter having a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.
申请公布号 US8149928(B2) 申请公布日期 2012.04.03
申请号 US20100782120 申请日期 2010.05.18
申请人 GRIFFIN JED D.;JEX JERRY G.;FORESTIER ARNAUD J.;VAKIL KERSI H.;KOLLA ABHIMANYU;INTEL CORPORATION 发明人 GRIFFIN JED D.;JEX JERRY G.;FORESTIER ARNAUD J.;VAKIL KERSI H.;KOLLA ABHIMANYU
分类号 H04B14/06;H04B14/04;H04L1/06;H04L7/06;H04L25/49;H04L27/24 主分类号 H04B14/06
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