发明名称 Array-type processor having plural processor elements controlled by a state control unit
摘要 A multiplicity of processor elements that are arranged in rows and columns individually execute data processing in accordance with instruction codes that are individually set as data and supply event data as output. A state control unit is composed of a plurality of units that successively switch the instruction codes of the multiplicity of processor elements in accordance with a computer program and the event data, these state control units communicating with each other to realize linked operation as necessary. An event distributing means distributes event data to this plurality of state control units that intercommunicate to realize linked operation, whereby the plurality of state control units can realize linked operation to control a large-scale state transition.
申请公布号 US8151089(B2) 申请公布日期 2012.04.03
申请号 US20030694822 申请日期 2003.10.29
申请人 FUJII TARO;FURUTA KOICHIRO;MOTOMURA MASATO;ANJO KENICHIRO;YABE YOSHIKAZU;AWASHIMA TORU;TOI TAKAO;NAKAMURA NORITSUGU;RENESAS ELECTRONICS CORPORATION 发明人 FUJII TARO;FURUTA KOICHIRO;MOTOMURA MASATO;ANJO KENICHIRO;YABE YOSHIKAZU;AWASHIMA TORU;TOI TAKAO;NAKAMURA NORITSUGU
分类号 G06F7/00;G06F15/00;G06F15/76;G06F15/80 主分类号 G06F7/00
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