发明名称 Output circuit for a semiconductor memory device and data output method
摘要 An outputting transistor circuit of a push-pull structure has an outputting PMOS transistor and an outputting NMOS transistor connected in series between a first power supply and a grounded power supply. In a standby state, a voltage level of a gate terminal of the outputting PMOS transistor is set to a voltage level of a second power supply higher than a voltage level of the first power supply. In an active state, a voltage level of the gate terminal of the outputting PMOS transistor is changed to a voltage level of the first power supply in response to an active command or a read command, or in response to the state of a semiconductor memory device changing to the active state or a read state, and either the outputting PMOS transistor or the outputting NMOS transistor is turned ON in response to a data read signal from a memory cell.
申请公布号 US8149632(B2) 申请公布日期 2012.04.03
申请号 US20100707140 申请日期 2010.02.17
申请人 MATSUI YOSHINORI;ELPIDA MEMORY, INC. 发明人 MATSUI YOSHINORI
分类号 G11C7/00 主分类号 G11C7/00
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