发明名称 |
THROUGH SILICON VIA WITH REDUCED SHUNT CAPACITANCE |
摘要 |
This document refers to apparatus and methods for a device layer of a microelectromechanical system (MEMS) sensor having vias with reduced shunt capacitance. In an example, a device layer can include a substrate having a pair of trenches separated in a horizontal direction by a portion of the substrate, wherein each trench of the pair of trenches includes first and second vertical layers including dielectric, the first and second vertical layers separated by a third vertical layer including polysilicon. |
申请公布号 |
WO2012040245(A2) |
申请公布日期 |
2012.03.29 |
申请号 |
WO2011US52417 |
申请日期 |
2011.09.20 |
申请人 |
FAIRCHILD SEMICONDUCTOR CORPORATION;BRYZEK, JANUSZ;BLOOMSBURGH, JOHN GARDNER;ACAR, CENK |
发明人 |
BRYZEK, JANUSZ;BLOOMSBURGH, JOHN GARDNER;ACAR, CENK |
分类号 |
B81C1/00;B81B1/00;B81B7/02;H01G7/00 |
主分类号 |
B81C1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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