METHOD OF FORMING THROUGH SILICON VIA USING LOW-K MATERIAL
摘要
<p>PURPOSE: A method for forming a through silicon via using a low dielectric material is provided to deduce the RC delay of an electric signal by forming an inter-metal dielectric layer and a via insulation film contiguous to a TSV(Through Silicon Via) into a low dielectric insulator layer. CONSTITUTION: A semiconductor substrate is etched and a first via hole is formed(S100). A low dielectric insulator layer filling the first via hole is deposited(S200). A second via hole is formed by etching a part of a low dielectric insulator layer in the first via hole. A via insulation film consisting of the low dielectric insulator layer and an inter metal dielectric are simultaneously formed on an upper part of the semiconductor substrate(S400). A metal layer filling the second via hole is deposited(S600). The metal layer on the upper part of the semiconductor substrate is removed(S700).</p>
申请公布号
KR20120030782(A)
申请公布日期
2012.03.29
申请号
KR20100092514
申请日期
2010.09.20
申请人
SAMSUNG ELECTRONICS CO., LTD.
发明人
HAN, KYU HEE;AHN SANG HOON;LEE, JANG HEE;BAEK, JONG MIN;KIM, KYOUNG HEE;PARK, BYUNG LYUL;KIM, BYUNG HEE