发明名称 DEBUGGING OF A DATA PROCESSING APPARATUS
摘要 A data processing apparatus is provided comprising data processing circuitry and debug circuitry. The debug circuitry controls operation of the processing circuitry when operating in a debug mode. The data processing circuitry determines upon entry into a debug mode a current operating state of the data processing apparatus. The data processing circuitry allocates one of a plurality of instruction sets to be used as a debug instruction set depending upon the determined current operating state.
申请公布号 WO2012038710(A1) 申请公布日期 2012.03.29
申请号 WO2011GB51410 申请日期 2011.07.25
申请人 ARM LIMITED;WILLIAMS, MICHAEL JOHN;GRISENTHWAITE, RICHARD ROY;CRASKE, SIMON JOHN 发明人 WILLIAMS, MICHAEL JOHN;GRISENTHWAITE, RICHARD ROY;CRASKE, SIMON JOHN
分类号 G06F11/36 主分类号 G06F11/36
代理机构 代理人
主权项
地址