发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <P>PROBLEM TO BE SOLVED: To reduce an erasure time of a nonvolatile semiconductor memory. <P>SOLUTION: The nonvolatile semiconductor memory in the embodiment has a controller for determining whether data erasure to a plurality of memory cells in a memory cell array is conducted per block or per page. The controller includes: first means (ST1-ST2) for performing verification by a verification circuit after conducting block erasure (provisional erasure) under predetermined conditions; second means (ST3-ST4) for continuously conducting block erasure when the number of memory cells which is determined to be completely erased through verification by the verification circuit is equal to or less than n (n is a predetermined natural number); and third means (ST5-ST6) for continuously conducting the page erasure when the number of the memory cells which is determined to be completely erased through verification by the verification circuit is over n. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012064290(A) 申请公布日期 2012.03.29
申请号 JP20100210003 申请日期 2010.09.17
申请人 TOSHIBA CORP 发明人 KASAI NOZOMU;HIRATA YOSHIHARU
分类号 G11C16/02 主分类号 G11C16/02
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