发明名称 |
CIRCUIT FOR SIMULTANEOUSLY ANALYZING PERFORMANCE AND BUGS AND METHOD THEREOF |
摘要 |
A circuit for simultaneously analyzing performance and bugs includes a mapping unit and a USB 3.0 data flow analyzer. The mapping unit is used for mapping commands transmitted to a USB 3.0 host through a peripheral component interconnect express and internal events of the USB 3.0 host to a packet of a USB 3.0 bus. The USB 3.0 data flow analyzer is used for analyzing performance and bugs of the USB 3.0 host through the packet of the USB 3.0 bus.
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申请公布号 |
US2012079161(A1) |
申请公布日期 |
2012.03.29 |
申请号 |
US201113233008 |
申请日期 |
2011.09.14 |
申请人 |
CHAO HSUAN-CHING;HUANG CHENG-PIN;LIN YU-CHIUN;CHIANG CHIA-CHUN |
发明人 |
CHAO HSUAN-CHING;HUANG CHENG-PIN;LIN YU-CHIUN;CHIANG CHIA-CHUN |
分类号 |
G06F13/36 |
主分类号 |
G06F13/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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