| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a peak hold circuit which can stably hold a peak amplitude within a certain period of time. <P>SOLUTION: The peak hold circuit comprises a first comparator 1 to which a modulated input signal and a DC potential of the input signal are input to be compared, a second comparator 2 to which the input signal and a predetermined reference voltage are input to be compared, and a second logic circuit (AND circuit) 4 to which an output from the first comparator 1 and an output from the second comparator 2 are input to cause a hold capacitor 5 to hold a DC potential of a peak amplitude of the input signal by performing on/off control of a second switch element 7 based on an AND resultant output of the outputs from the first comparator 1 and the second comparator 2. <P>COPYRIGHT: (C)2012,JPO&INPIT |
